The Path Beyond Moore - Introduction to SiP.

International Semiconductor Route Organization (ITRS) definition: SiP is a number of active electronic components with different functions and optional passive devices, as well as other devices such as MEMS or optical devices priority assembly together to achieve a certain function of a single standard package, forming a system or subsystem.

Architecturally speaking, SiP integrates a variety of functional chips, including processors, memory and other functional chips, in a package to achieve a basically complete function. Corresponds to SOC (System on Chip). The difference is that system-level packaging is a side-by-side or superimposed package of different chips, and SOC is a highly integrated chip product.

1.1. More Moore VS More than Moore——SoC VS SiP

SiP is an important implementation path beyond Moore's Law. What is the future of Moore's Law? There are two paths in the industry: one is to continue to develop in accordance with Moore's Law, and the products that take this path are CPU, memory, logic devices, etc., which account for 50% of the entire market. In addition, the More than Moore line beyond Moore's Law, chip development from the pursuit of power consumption reduction and performance improvement, to more pragmatic to meet the needs of the market. Products in this area include analog /RF devices, passive devices, power management devices, etc., accounting for about 50% of the remaining market.

For these two paths, two products were born: SoC and SiP. SoC is the product of Moore's Law continuing to go down, and SiP is an important path to achieve beyond Moore's Law. Both are products that enable miniaturization and miniaturization of systems at the chip level.

SoC与SIP是极为相似，两者均将一个包含逻辑组件、内存组件，甚至包含被动组件的系统，整合在一个单位中。SoC是从设计的角度出发，是将系统所需的组件高度集成到一块芯片上。SiP是从封装的立场出发，对不同芯片进行并排或叠加的封装方式，将多个具有不同功能的有源电子元件与可选无源器件，以及诸如MEMS或者光学器件等其他器件优先组装到一起，实现一定功能的单个标准封装件。

In terms of integration, under normal circumstances, SoC only integrates logic systems such as AP, while SiP integrates AP+mobile DDR, to some extent SIP=SoC+DDR, with the future integration degree becoming higher and higher, emmc is also likely to be integrated into SiP.

From the perspective of packaging development, due to the needs of electronic products in terms of volume, processing speed or electrical characteristics, SoC has been established as the key and development direction of future electronic product design. However, with the increasingly high production cost of SoC in recent years, technical obstacles are frequently encountered, resulting in the development of SoC facing bottlenecks, and then the development of SiP is more and more attention by the industry.

1.2. SiP——The inevitable choice path beyond Moore's Law

Moore's Law ensures that chip performance continues to improve. As we all know, Moore's Law is the "Bible" for the development of the semiconductor industry. In silicon-based semiconductors, the feature size of transistors is halved and performance is doubled every 18 months. At the same time, the performance improvement brings the cost reduction, which makes semiconductor manufacturers have enough motivation to achieve the reduction of semiconductor feature size. Among them, processor chips and memory chips are the two types of chips that most comply with Moore's Law. Intel, for example, has perfected Moore's Law with each generation of products. At the chip level, Moore's Law has pushed performance forward.

PCB board does not comply with Moore's law, is the bottleneck of the entire system performance improvement. Corresponding to the shrinking size of the chip, the PCB board has not changed much over the years. For example, the standard minimum line width of PCB motherboards has gone from 3 mil (about 75 um) a decade ago to 3 mil today, with little progress. After all, PCBS don't follow Moore's Law. Because of the limitation of PCB, the performance improvement of the whole system has encountered a bottleneck. For example, since the PCB line width has not changed, the line density between the processor and the memory has also remained unchanged. In other words, the number of connections between the processor and memory does not change significantly if the size of the processor and memory package does not change much. The bandwidth of the memory is equal to the bit width of the memory interface multiplied by the operating frequency of the memory interface. The memory output bit width is equal to the number of connections between the processor and memory, and has not changed in 64bit for a decade due to PCB process limitations. Therefore, if you want to improve the memory bandwidth, you can only increase the operating frequency of the memory interface. This limits the overall system performance improvement.

SIP is a winning solution to system shackles. The multiple semiconductor chips and passive devices are packaged in the same chip to form a system-level chip, and the PCB board is no longer used as the carrier between the chip connections, which can solve the problem of system performance bottlenecks caused by the inherent shortcomings of the PCB itself. Take the processor and memory chip as an example, because the density of the internal wiring of the system-level package can be much higher than the PCB wire density, thus solving the system bottleneck caused by the PCB line width. For example, because the memory chip and the processor chip can be connected together through the way of perforation, the PCB line width is no longer limited, so that the data bandwidth can be improved in the interface bandwidth.

We see SiP as more than simply integrating chips together. SiP also has a short development cycle; More functions; Lower power consumption, better performance, lower cost price, smaller volume, lighter quality and other advantages, summarized as follows:

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